Share your masking and processing costs with other designers to manufacture silicon photonic ICs on imec’s platform.
From telecom and datacom to sensing: many applications stand to benefit from the use of integrated circuits that use silicon photonics to combine passive and active components on a single chip.
Imec’s SOI-based integrated silicon photonics platform (iSiPP) offers you the tools to develop such a photonic integrated circuit (PIC). Through a multi-project wafer (MPW) or shared run, you can affordably manufacture small batches of these PICs by sharing costs with other designers.
For easy access to low volumes of silicon photonic ICs, imec.IC-link offers its MPW-service, which allows you to share masking and processing costs with other designers.
Currently, imec offers the following technologies for MPW customers:
Our MPW services are provided through the Europractice platform, where imec is one of the partners.
Want even more flexibility? We also offer low- or mid-volume dedicated runs that give you more opportunity for customization. Contact us for more information.
The iSiPP50G platform co-integrates various passive and active components. It supports a range of optical transceiver architectures, at data rates of 25 or 50 Gb/s. You have access to integrated components such as:
The iSiPP50G platform offers excellent performance and design flexibility, and unrivalled critical dimension and thickness control. It’s a mature process technology (130nm) with a proven device library.
Si-Photonics Passives+ technology is a subset of iSiPP50G technology.
Its main features are: