Radiation hardened CMOS technology by design
Imec.IC-link develops radiation-hardened design platforms using layout and circuit design techniques applied to commercial CMOS foundry technology. Our platforms are called DARE: Design Against Radiation Effects.
DARE platforms provide cost-effective, customer-oriented, high-performance, and reliable solutions for ASICs that must withstand space radiation environments like GEO, MEO, LEO as well as Lunar, Martian and other deep space missions.
Overview
(*) Combinatorial=Equivalent #ND2/mm2; Sequential=Scan-Reset SEU #FF/mm2
(**) hardened FF
(***) under development (estimated performance)
GB=Guard Band; DNW=Deep NWell; BOX=Buried Oxide; ELT=Enclosed Layout Transistor; BB=Back Bias; HIT=Heavy Ion Tolerant; DICE=Dual Interlocked Cell; WTD=Well Tap Density; TMR=Triple Modular Redundancy
IP portfolio
DARE22G IPs
DARE65T IPs
DARE180U IPs
DARE180XH IPs
Product briefs
Silicon validation
Papers
Radiation-tolerant standard-cell library for a commercial deep sub-micron technology.
Redant S., De Mey B., Folens L., Van Thielen B., Hollreiser M.A. RADECS Workshop, Padova, Italy 2002.
The Design Against Radiation Effects (DARE) library.
S. Redant, R. Marec, L. Baguena, E. Liegeon, J. Soucarre, B. Van Thielen, G. Beeckman, P. Ribeiro, A. Fernandez-Leon, B. Glass. RADECS Workshop, September 2004 Madrid.
DARE180X: A 0.18µm mixed-signal radiation-hardened library for low-power applications.
G. Franciscatto, E. Geukens, G. Thys, S. Redant, Y. Geerts, M. Fossion, A. Van Esbeen. AMICSA 2014
Incorporating more in-depth radiation knowledge in the DARE180U analog design kit.
S. Verhaegen, W. Sijbers, S. Zagrocki, L. Berti, J. Wouters, G. Franciscatto, G. Thys, S. Redant, B. Glass, R. Jansen. AMICSA & DSP 2016
A mix-signal radhard micro-controller: DPC.
M. Fossion, A. Van Esbeen, T. Van Humbeeck, Y. Geerts, E. Geukens, S. Redant, R. Jansen, C. Monteleone. AMICSA 2018
Radiation hardened versatile 14-bit SAR ADC.
L. Berti, E. Boufouss, Z. Li, G. Thys, M. Kakoulin. AMICSA 2022
Radiation hardened by design SONOS embedded non-volatile memory in 180nm.
Y. Gubin, D. Arslanov, A. Davies, V. Razumniy, A. Bucci, L. Berti, K. Vanhoutte, A.S. Safri, G. Rybalov, M. Kakoulin. AMICSA 2022
First silicon enabling rad-hard non-volatile memory in 22nm technology for space applications.
P. Zuber, A. Bucci, L. Berti, G. Pollissard, E. Timokhin, G. Franciscatto, S. Dupont, G. Glorieux, K. Bertrand, A. Dhiman, E. da Costa Losqui, K. Vanhoutte, G. Thys, M. Kakoulin. AMICSA 2022
Validation, characterization and irradiation testing of the DARE65T platform.
M. van de Burgwal, E. Boufouss, B. Vignon, L. Berti, G. Thys, M. Kakoulin. AMICSA 2022
Detailed SET ionized charge and pulse duration measurement of a 65nm CMOS technology.
Z. Li, L. Berti, J. Wouters, B. Vignon, G. Thys, J. Wang, P. Leroux, M. Kakoulin. AMICSA 2022
DARE22 test vehicle design for a 22nm FDSOI process.
E. Boufouss, P. Zuber, L. Berti, A. Dhiman, E. da Costa Losqui, G. Thys, M. Kakoulin. AMICSA 2022
PROMISE, programmable mixed signal ASIC electronics framework.
L. Berrejo, F. Veljkovic, A. Alvaro, P. Ayzac, Y. Dupret, S. Pereira, M. Kakoulin, L. Berti, Y. Gubin, G. Franciscatto, G. Thys, D. Arslanov, D. Baramilis, A Roumkou, C. Kordalis, R. Povoa, J. Guilherme, N. Horta, K. Tukkiniemi. AMICSA 2020
DARE65 phase-locked loop design.
S. Kim, L. Berti, G. Thys, S. Zagrocki, B. Blockx, M. Kakoulin. AMICSA 2020
